An Adaptive Technique for Reducing Leakage and Dynamic Power in Register Files and Reorder Buffers
نویسندگان
چکیده
Contemporary superscalar processors, designed with a one-size-fitsall philosophy, grossly overcommit significant portions of datapath resources that remain unnecessarily activated in the course of program execution. We present a simple scheme for selectively activating regions within the register file and the reorder buffer for reducing leakage as well as dynamic power dissipation. Our techniques result in power savings in excess of 60% in these components, on the average with no performance loss.
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